Daisy Chain
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Multiple devices that are connected in series. The output of the first device is connected to the input of the next device.
Source: Xilinx
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Damage Threshold
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Damped Wave
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A sinusoidal wave in which the amplitude steadily decreases with time. Often associated with energy loss.
Source: Interface Bus
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Damping
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Reduction in magnitude of oscillation due to energy being dissipated as heat.
Source: Twisted Pair
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Darkfield Illumination
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An optical technique where the specimen is seen as a bright object against a dark background.
Source: FRT of America
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Darlington Drive Output Current
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Darlington drive digital outputs are digital channels with higher current drive capability than typical digital channels. The Darlington drive output current specification indicates which ports have darlington drive capability. The specification also indicates the current the channel can source into a given resistance at a given voltage. The current is specified as a negative number to emphasize that current is being sourced by the DAQ product.
Source: National Instruments
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Data Acquisition
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A circuit that can digitize and process the output of sensors or signals in order to monitor, analyze and/or control systems and processes. Data acquisition can also filter, amplify, and other processes sensor outputs so that they can be read by computers.
Source: A.T.E. Solutions, Inc.
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Data Bus
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A bi-directional set of signals used by a computer to convey information from a memory location to the central processing unit and vice versa. More generally, a set of signals used to convey data between digital functions.
Source: Maxfield & Montrose Interactive Inc.
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Data Circuit-terminating Equipment
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(DCE) -
In a data station, the equipment that performs functions, such as signal conversion and coding, at the network end of the line between the data terminal equipment (DTE) and the line, and that may be a separate or an integral part of the DTE or of intermediate equipment. The interfacing equipment that may be required to couple the data terminal equipment (DTE) into a transmission circuit or channel and from a transmission circuit or channel into the DTE.
Source: Interface Bus
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Data Extender
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Takes an input image of lower resolution and creates one of higher resolution.
Source: Datacube
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Data Eye
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A representation of digital data, typically measured on an oscilloscope. Bits of ‘1’s and ‘0’s are super-imposed in one bit period.
Source: Ziad A. Matni of Inphi Corporation
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Data Link Layer
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The OSI level that performs the assembly and transmission of data packets (gets data packets on and off the wire), does error detection and correction, synchronization and retransmission. It includes the Medium Access Control (MAC) & Logical Link Control (LLC). The LLC on the upper half, which does the error checking The MAC on the lower half, which deals with getting the data on and off the wire. The primary purpose of the Data Link Layer is to provide error-free transmission of information between two end stations "edge nodes" attached to the same physical cable or media. This then allows the next higher layer to assume virtually error-free transmission over the physical link. The Data Link Layer is responsible for packaging and placing data on the network media. It then manages how the flow process of the bit stream takes place.
Source: Xilinx
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Data Logging
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The recording of selected information during a specified operation, such as data recorded during a device-test run.
Source: ATE World
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Data Register Scan
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(DR scan) -
A scan operation that includes shifting new data into test data registers from the TDI buffers and shifting captured data out into the
TDO buffers while the TAP controller is in Shift-DR state. The test controller automatically shifts a number of bits equal to the
combined length of the selected test data registers of all devices in
the scan path.
Source: Texas Instruments
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Data Transfer Rate
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The average number of bits, characters, or blocks per unit time passing between corresponding equipment in a data transmission system.
Source: Interface Bus
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Data Transfers
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The methods available to transfer digitized data from the DAQ board to computer memory. Options for data transfer are DMA, interrupt, and programmed I/O. For programmed I/O transfers, the CPU in the PC reads data from the DAQ board whenever the CPU receives a software code to acquire a single data point. Interrupt data transfers occur when the DAQ board sends an interrupt to the CPU, telling the CPU to read the acquired data from the DAQ board. DMA transfers use a DMA controller instead of the CPU to move acquired data from the board into computer memory. Even though high-speed data transfers can occur with interrupt and programmed I/O transfers, they require the use of the CPU to transfer data. DMA transfers are able to acquire data at high speeds and keep the CPU free for performing other tasks at the same time.
Source: National Instruments
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DC Accuracy
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The difference of the set-up voltage and actual output voltage.
Source: Tektronix
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DC Fault Models
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Mathematical descriptions of faulty behavior designed to assess structural compliance of a circuit independent of any timing requirements -- the most common example is the gate-level stuck-at fault model.
Source: Inovys
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DC Offset
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A constant voltage added to an input signal. DC-offset can vary with time, temperature and/or changes in corner-frequency settings.
Source: Frequency Devices, Inc.
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DC Scan
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Form of scan where shifting and sampling occurs well below the devices normal operating frequency. This type of scan is effective for a 'pure' structural approach (i.e. for stuck-at faults) and, in general, timing performance cannot necessarily be verified with this type of scan.
Source: NPTest
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